Upgrading a Legacy WIZnet W5100 Design: W5100S or W5500? (Compatibility at a Glance)
Maintaining a legacy W5100 design, facing EOL risk or wanting lower power? WIZnet offers two upgrade paths: W5100→W5100S (firmware unchanged, adds power-saving and WoL, but the package goes 80→48 pin so the board is re-laid-out) and W5100→W5500 (8 sockets/32KB/80MHz). This guide lays out the trade-offs in one compatibility table.
Two upgrade paths, very different
When maintaining a legacy W5100 design, facing EOL risk or wanting to save power, WIZnet gives you two upgrade paths that are very different: 1) W5100 → W5100S, a like-for-like successor — your existing W5100 firmware runs unmodified, with added power-saving and new features; 2) W5100 → W5500, a step-up — twice the sockets and buffer, and faster SPI. Both paths require re-layout (below), but the compatibility and trade-offs differ, so understand them before you start.
⚠️ W5100 → W5100S is firmware-compatible, not a pin drop-in
One point to be clear about first: W5100 → W5100S is firmware-compatible, not a pin drop-in. WIZnet’s official datasheet states that existing W5100 firmware can be used on the W5100S without modification, so the software side barely changes; but the packages differ — the W5100 is an 80-pin LQFP while the W5100S is a 48-pin LQFP/QFN (7×7mm), so the pin count and layout change and the PCB must be re-laid-out. It is a software drop-in but a hardware re-design — do not assume you can just unsolder and swap.
What the W5100S adds over the W5100
The W5100S keeps the same 4 sockets, 16KB buffer and integrated 10/100 PHY, but adds: power saving (Ethernet Power Down Mode + main-clock gating), Wake on LAN over UDP, socket-less ARP/PING commands (run them without occupying a socket), SPI upgraded from MODE 0 only to MODE 0/3 and up to 70MHz (the W5100’s SPI is much slower), plus network-status LEDs and a set of new registers. For an existing W5100 design it is WIZnet’s designated continuation/successor: firmware unchanged, more features, and lower power.
When to step up to W5500 (and it shares the W5100S footprint)
When should you jump straight to the W5500 instead of the W5100S? When you need more connections (8 sockets vs 4), a bigger buffer (32KB total, allocatable per socket, vs 16KB), or faster SPI (80MHz). The cost is that the W5500 is SPI-only (no parallel bus) and, like the W5100, needs re-layout. A very practical point: the W5100S and W5500 share the same 48-pin 7×7mm package/footprint — so if you go to the W5100S first (re-laying the board once), later moving to the W5500 usually needs only a schematic change, not another layout. That makes “W5100 → (re-layout once) W5100S → W5500 in future” a smooth upgrade path.
How to choose
To keep an old W5100 design alive with minimal change while gaining power-saving/WoL → choose the W5100S (firmware unchanged; accept one PCB re-layout). If you still need the parallel-bus interface → only the W5100S has it (the W5500 is SPI-only). If you need 8 sockets, a 32KB buffer or 80MHz high-speed SPI → choose the W5500. If you want a low-risk “W5100S now, W5500 later” path → they share a footprint, so going W5100S then W5500 needs only a schematic change. All three are 3.3V/5V-tolerant with an integrated 10/100 PHY and hardwired TCP/IP. JLink Technology is an authorized WIZnet distributor supplying the W5100S / W5500 / W6100 and more; tell us your current W5100 design and needs (socket count, throughput, whether you need the parallel interface) and we will map the upgrade part, provide samples and datasheets, and reply with stock, pricing and lead time.
Products mentioned
W5100S Hardwired TCP/IP Ethernet Controller (Multi-Interface)
W5100S is an enhanced version of W5100, supporting both SPI and parallel interfaces with 16KB TX/RX buffer and 4 sockets. Adds SOCKET-less commands, Wake on LAN (WOL), and PHY power-down mode compared to W5100 — ideal for embedded systems requiring a parallel bus interface.
W5500 Hardwired TCP/IP Ethernet Controller
W5500 is WIZnet's flagship Ethernet controller with a unique hardwired TCP/IP stack, enabling direct network connectivity without software TCP/IP implementation. Connects to the host MCU via SPI, features 32KB TX/RX buffer, supports up to 8 sockets — the most widely adopted Ethernet chip in the Arduino/Raspberry Pi ecosystem.
W5100 Hardwired TCP/IP Ethernet Controller (Classic)
The W5100 is WIZnet's classic hardwired TCP/IP Ethernet controller (used on the Arduino Ethernet Shield), integrating 10/100 MAC+PHY, 4 hardware sockets, and a 16KB buffer, with a parallel-bus and SPI host interface in an 80-pin LQFP, 3.3V with 5V-tolerant I/O. The newer W5100S is register/software-compatible with faster SPI in a smaller package.
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