GD32 Low-Power Modes: Choosing Between Run / Sleep / Deep-sleep / Standby
The key to power saving is duty-cycling: the deeper you sleep and the shorter the active time, the longer the battery lasts. This guide covers GD32's four states (Run/Sleep/Deep-sleep/Standby) — what stays on, how it wakes, whether RAM is retained, and the current tier — and states honestly that Standby resets + loses RAM and the µA figures are typical, not guaranteed, then points out the real advantage of the low-power GD32L23x line: µA-level modes that still retain SRAM.
The key to power saving is duty-cycling
The key to MCU power saving isn't "which mode has the smallest number," but duty-cycling: keep the MCU in the deepest sleep you can tolerate for as long as possible, and squeeze each wake's "active time" to a minimum. Average current ≈ (active current × active time + sleep current × sleep time) ÷ period; because active is mA-level and sleep is µA-level, "shortening active + sleeping deeper" affects battery life far more than anything else. Grasp that first, then choose a GD32 power mode.
The four states at a glance
GD32 (mainstream F1/F3/F4 families) has three power-saving modes plus normal Run, four states in all. Run: full speed, highest current (mA-level). Sleep: only the CPU clock stops, peripherals and clocks keep running and state is fully retained, any interrupt wakes it instantly (shortest latency, µs-level), but current is still mA-level. Deep-sleep (equivalent to others' Stop): the clocks of the 1.2V domain plus HXTAL/internal RC/PLL all turn off, SRAM and registers are retained, it wakes from the EXTI lines (EXTI pins, RTC alarm/timestamp, LVD, USART, etc.), current drops to µA-level, and on wake it defaults to the internal RC (IRC8M on the F-series) as the system clock and needs the PLL reconfigured. Standby: the whole 1.2V domain and the LDO shut down, lowest current (µA / sub-µA level), but the longest wake time. (Each mode's current/latency is a typical value that varies with voltage/temperature/clock/peripherals — go by the specific part's latest datasheet.)
⚠️ Standby resets + loses RAM; the numbers are typical
Standby has two behaviors you must know. One, it "resets + loses RAM": waking is a power-on reset, the core restarts from 0x00000000, SRAM and general registers are lost, and only the "backup registers (backup domain, powerable from VBAT)" survive — so to keep a little state across Standby, write it to the backup registers or rely on the RTC. Two, Standby's wake sources are limited: typically an NRST reset, the RTC, an independent-watchdog reset, and a rising edge on a WKUP pin (4–5 depending on family; the number of WKUP pins varies by part). Also note: the µA numbers on datasheets are all typical (characterized, not production-tested, and condition-dependent) — don't treat them as guarantees; design and measure at your real conditions.
The real advantage of the GD32L23x low-power line
For a battery or energy-harvested node, don't just look at mainstream GD32 — GigaDevice has a dedicated low-power line, the GD32L23x (e.g. GD32L233, Cortex-M23, 40nm ultra-low-power). It slices sleep finer (Sleep/Sleep1/Sleep2, Deep-sleep/Deep-sleep1/Deep-sleep2, 10 modes in all), and its real advantage isn't only a lower Standby number — it's having "µA-level modes that still retain SRAM + registers": by the GD32L233 datasheet's typical values, Deep-sleep 1 ≈ 3.1µA, Deep-sleep 2 ≈ 1.7µA (SRAM retained), Standby ≈ 0.44µA; plus low-power wake peripherals like LPUART, LPTIMER and I²C address-match that can react without fully waking. Against the mainstream GD32E230 (M23), Standby already reaches ~1.6µA, but there's no "µA-level with state retained" mode. Its clock-on-exit also defaults to IRC16M (L23x), unlike the F-series (IRC8M) — either way firmware must reconfigure the clock tree after waking.
How to choose + RTC wake + energy harvesting
Design and selection: first, sleep as deep as you can and cut active time to the minimum (duty-cycling is the biggest lever); use the RTC wakeup timer (or LPTIMER) to schedule wakes rather than polling — GD32's RTC wakeup timer and alarm both wake Deep-sleep via EXTI. Second, gate the clocks of unused peripherals and slow HCLK even in Run (GigaDevice explicitly lists this as a first-line power technique, roughly halving Run current in tests). Third, match wake latency to sleep depth (Sleep µs-level / Deep-sleep ~tens of µs / Standby tens of µs) — if you must react in single µs, you can't sit in Standby. Fourth, mind "do you need RAM on wake": to keep RAM, stay at Deep-sleep or above (or the GD32L23x's Deep-sleep 1/2); Standby loses RAM and needs re-init. On parts: battery/energy-harvested nodes → GD32L23x (GD32L233) + Deep-sleep + RTC wake (this connects to the earlier EM8500 energy-harvesting story); mostly mains/USB-powered and waking infrequently → mainstream GD32E23x/F-series is fine. JLink Technology is an authorized GigaDevice distributor supplying the low-power GD32L23x and the mainstream GD32E/F lines; tell us your power source, wake frequency, standby-current target and the state you need to retain, and we will help with selection and reply with samples, datasheets and pricing.
Products mentioned
GD32L233 Ultra-Low-Power Arm Cortex-M23 MCU
The GD32L233 is an ultra-low-power Arm Cortex-M23 MCU from GigaDevice on a 40nm ULP low-leakage process at up to 64MHz, with 64~256KB Flash and 16~32KB SRAM. With ~2µA deep-sleep and ~0.4µA standby current, plus low-power timer/UART, RTC, and LCD driver, it suits battery-powered smart meters, medical, and IoT sensing. QFN32 / LQFP32/48/64.
GD32E230 Arm Cortex-M23 Low-Power MCU
The GD32E230 uses the Arm Cortex-M23 core at up to 72 MHz, targeting low cost and low power — ideal for appliance control, compact sensors, and cost-sensitive consumer products. Available in TSSOP/QFN/LQFP compact packages.
GD32F303 Arm Cortex-M4 Mainstream MCU
The GD32F303 is a mainstream Arm Cortex-M4 MCU from GigaDevice at 120MHz (with DSP/FPU/MPU), 128KB~3MB Flash, 32~96KB SRAM, 3× 12-bit ADC, 2× DAC, rich timers, and USB FS/CAN/SDIO. In LQFP48/64/100/144, it is commonly used as an M4 upgrade from STM32F1 or an STM32F303-class alternative.
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